Experimental Implementation of Networked Chaotic Oscillators Based on Cross-Coupled Inverter Rings in a CMOS Integrated Circuit

Ludovico Minati

Research output: Contribution to journalArticlepeer-review


A novel chaotic oscillator based on "cross-coupled" inverter rings is presented. The oscillator consists of a 3-ring to which higher odd n-rings are progressively coupled via diodes and pass gates; it does not contain reactive or resistive elements, and is thus suitable for area-efficient implementation on a CMOS integrated circuit. Numerical simulation based on piece-wise linear approximation predicted the generation of positive spikes having approximately constant periodicity but highly variable cycle amplitude. Simulation Program with Integrated Circuit Emphasis (SPICE) simulations and experimental data from a prototype realized on 0.7 μm technology confirmed this finding, and demonstrated increasing correlation dimension (D2) as 5-, 7-and 9-rings were progressively coupled to the 3-ring. Experimental data from a ring of 24 such oscillator cells showed phase synchronization and partial amplitude synchronization (formation of small clusters), emerging depending on DC gate voltage applied at NMOS transistors implementing diffusive coupling between neighboring cells. Thanks to its small area, simple synchronizability and digital controllability, the proposed circuit enables experimental investigation of dynamical complexity in large networks of coupled chaotic oscillators, and may additionally be suitable for applications such as broadband signal and random number generation.

Original languageEnglish
Article number1550144
JournalJournal of Circuits, Systems and Computers
Issue number9
Publication statusPublished - Oct 28 2015


  • Chaotic oscillator
  • CMOS
  • correlation dimension (D<inf>2</inf>)
  • cross-coupled
  • diffusive coupling
  • inverter
  • mutual information
  • partial synchronization
  • phase synchronization
  • ring

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Hardware and Architecture


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